1. Field of the Invention
Embodiments of the invention relate to control methods of multilevel power converters for converting DC power to AC power or converting AC power to DC power.
2. Description of the Related Art
FIG. 4 shows an example of a five-level inverter circuit that is a power converter circuit for converting DC to AC power. The reference numerals 1 and 2 designate series-connected DC power supplies with each voltage of 2Ed composing a DC power supply assembly having a positive terminal electric potential of P, a negative terminal electric potential of N, and a middle point electric potential of M. This DC power supply system can be generally constructed from an AC power supply system with two series-connected DC power supplies composed of a rectifier and a large capacitance capacitor, which are not shown in the figure.
The symbols S1, S7, S8, and S6 designate four semiconductor switches of IGBTs, each having an antiparallel-connected diode, series-connected between the P side electric potential and the N side electric potential. The Symbols S2 and S5 designate IGBTs, each having an antiparallel-connected diode, connected between the connection point of the IGBTs S1 and S7 and the connection point of the IGBTs S8 and S6, respectively. The symbol S9 designates a bidirectional semiconductor switch connected between a series-connection point, the M electric potential, of the DC power supplies 1 and 2 and the series-connection point of the IGBTs S7 and S8. The bidirectional semiconductor switch can be composed by antiparallel connection of reverse-blocking IGBTs as shown in FIG. 4, or by combination of IGBTs Q1 and Q2 without reverse-blocking ability having diodes D1 and D2 as shown in FIGS. 9A and 9B. FIG. 9A shows the IGBT Q1 and the IGBT Q2 with commonly connected collectors and FIG. 9B shows the IGBT Q1 and the IGBT Q2 with commonly connected emitters.
The reference numeral 10 designates a capacitor so-called flying capacitor that is controlled to have an averaged voltage of Ed across the capacitor and produces an output at a middle electric potential of the DC power supply 1 or 2 utilizing charging and discharging phenomena of the capacitor. The circuit 11U of these components is a circuit for a U-phase. A circuit 11V for a V-phase and a circuit 11W for a W-phase can be similarly formed to construct a three-phase inverter.
Reference numeral 12 designates an AC electric motor, an example of load on this inverter system. The inverter of this circuit construction delivers five levels of output at the output terminal 13 of this converter: a P potential, N potential, M potential, and two other intermediate potentials P potential (2 Ed)−Ed and N potential (−2 Ed)+Ed of the DC power supply 1 or 2 utilizing the ON/OFF operation of the semiconductor switches and the voltage across the capacitor 10. FIG. 10 shows an example of waveform of the output voltage Vout.
This inverter of five levels of output, as compared with an inverter of two-level type, generates smaller harmonics components of low order and reduced switching loss in the semiconductor switches. Thus, a system with high efficiency can be constructed.
FIGS. 5 and 6 show circuits of basic form of multilevel conversion circuit such as the five level converter of FIG. 4. The circuit of FIG. 5 has a construction of the circuit of FIG. 4 from which the IGBTs S2 and S5 are removed. The circuit of FIG. 6 has a construction in which the function of the IGBTs S7 and S9 in FIG. 4 is performed by the bidirectional switch S12 and the function of the IGBTs S8 and S9 is performed by the bidirectional switch S13. Five or more levels of multilevel converter circuit can be obtained by adding a converting circuit(s) comprising semiconductor switches(s) between the terminals 16 and 17 in FIG. 5 or between the terminals 18 and 19 in FIG. 6. The circuit of FIG. 4 is an example of adding the IGBTs S2 and S5 between the terminals 16 and 17 of FIG. 5.
FIG. 7 shows a first example of seven-level inverter circuit as an application of the multilevel converter circuit. With the DC power supply voltage of 3Ed×2, output of seven levels of electric potentials can be obtained by connecting a capacitor 20 charged at one unit of voltage Ed between the collector of the IGBT S3 and the emitter of the IGBT S4 and connecting a capacitor 21 charged at two units of voltage 2Ed between the collector of the IGBT S2 and the emitter of the IGBT S5.
FIG. 8 shows a circuit construction having all the switching elements exhibiting the same withstand voltage. The circuit of FIG. 7 needs four series connection of such switches for each of the IGBTs S1 and S6 in FIG. 7, and two series connection of such switches for each of the IGBTs S7 and S8 in FIG. 7. In order for each element to bear equal voltage in a static condition of this circuit, dividing resistors (not shown in the figure) are generally connected in parallel with the IGBTs. However, the provision of such dividing resistors is not directed to accomplish equal voltage sharing in a dynamic condition such as in a switching process. Therefore, another measure is needed to cope with the equal voltage sharing in the switching process. FIG. 11 shows a variation of a seven level converter circuit in which a capacitor 22 charged at a one unit of voltage Ed is connected between the connection point of the IGBT S7a and the IGBT S7b in FIG. 8 (the connection point of the IGBT S10 and the IGBT S7 in FIG. 11) and the connection point of the IGBT S8a and the IGBT S8b in FIG. 8 (the connection point of the IGBT S8 and the IGBT S11 in FIG. 11).
Japanese Patent Application No. JP 2009-525717, for example, discloses examples of a five level inverter circuit and the basic circuits of multilevel circuits.
When a total phase interruption is forcedly conducted in a system shut down in a system of multilevel circuit of three or higher levels, for example the seven level circuit shown in FIG. 12A, from a normal operation in which the IGBTs S1a through S1d, S2, and S3 are in the ON state and an electric current is flowing to the AC output, gate interruption is conducted simultaneously for every IGBT of S1a through S1d, S2 and S3. The current is transferred, as shown in FIG. 12B, to the diodes that are antiparallel-connected to the IGBTs S4, S5, and S6a through S6d. At this time, the circuit between the collector of the IGBT S1a and the emitter of the IGBT S3 is subjected to a voltage over 6Ed including transient surge voltage.
Although the series-connected circuit of the IGBTs S1a through S1d is subjected to a voltage of at least 4Ed, if the voltage is equally shared by each of the series-connected elements, each elements undergoes a voltage of about one unit Ed. Actually, unbalance in voltage sharing may occur due to scattering of signal transmission time of the gate circuit for driving these series-connected IGBTs and variation of switching characteristics of the IGBTs. As a consequence, a specific one of the IGBTs may be subjected to an overvoltage, resulting in breakdown of the element.
The breakdown of the semiconductor switches could be avoided even in the condition of unbalanced voltage if elements of high withstanding voltage are employed. Such a measure, however, has problems of large size and high cost. Thus, there is a need in the art for improved converter equipment and semiconductor switches.